With the RISC-V V extension reaching version 1.0 and being frozen, the focus has now shifted to software and, compiler technologies, and how to make optimal use of the scalar and vector computational units in RISC-V CPUs and SoCs. Since LLVM 14, the RISC-V target is supporting VLA autovectoriation by default, and this paves the way to further enhance the vectorizer and optimization passes. In this technical presentation, we’ll share the latest developments in LLVM vectorizer technology and how to ensure that C and C++ code get the most benefit from it. This includes learning what auto vectorization is, opportunities that the compiler looks for when translating C and C++ code into RISC-V vector instructions, how best to write new C and C++ software to resulting in optimized vector instructions. We’ll also highlight some pitfalls found in traditional C and C++ code and opportunities to address themimprove it.
