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December 13-14, 2022 | San Jose, CA + Virtual
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Tuesday, December 13 • 10:00am - 10:15am
RISC-V Spotlight: Improving RISC-V Quality with Verification Standards and Advanced Methodologies - Simon Davidmann, CEO, Imperas Software & Verification Task Group Chair, OpenHW Group

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The freedom of RISC-V represents both new innovations in design and also the migration of
verification responsibility. This keynote highlights the challenges facing SoC teams as they
adopt RISC-V and provides a perspective on how the use of new verification standards and
methodologies drives down cost, quality risk, and development time.

Speakers
avatar for Simon Davidmann

Simon Davidmann

CEO, Imperas Software
Simon Davidmann has been working on simulators and EDA products since 1978. He is founder and CEO of Imperas and initiator of Open Virtual Platforms (www.OVPworld.org) - the place for Fast Processor Models. Simon is also the chair of the Verification Task Group of the OpenHW Group... Read More →


Tuesday December 13, 2022 10:00am - 10:15am PST
Hall 3
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