Ken Dockser is a CPU architect at Rivos Inc, where he defines the macro-architecture for high-performance RISC-V CPUs. Ken's previous position was at Qualcomm where he headed up Processor Research (concentrating on RISC-V) as a Senior Director. Before that he was a CPU architect for Qualcomm's ARM-based servers and mobile devices. Ken has also worked as a CPU architect for IBM (PowerPC), VLSI Technology (ARM), MIPS/SGI (MIPS), Nexgen (x86), and DEC (VAX and MIPS). Ken has been very active in RISC-V International including his current position as Vice Chair of the Cryptographic Extension Task Group. In the past he has served on the RISC-V Board of DIrectors as well as Chair and major contributor to other Task Groups. Ken has been an active member of the IEEE-754 floating point committee over the last couple of decades, and more recently he helped found the P3109 Floating point arithmetic for ML working group. Ken has been granted over 3 dozen US patents with more in the pipe.